1. Field of the Invention
The present invention relates to an analog-to-digital (AD) converter for converting an analog voltage to digital data.
2. Description of the Background Art
A conventional serial-parallel type of AD converter includes a plurality of parallel ADCs (Analog-to-Digital Converters). Specifically, an analog input signal is input to an M-bit ADC on the input terminal of the AD converter and converted to M bits of digital data by one of the parallel ADCs. A DAC (Digital-to-Analog Converter) included in the AD converter converts the digital data to a corresponding analog voltage. A differential circuit included in the AD converter produces a difference between the analog voltage produced by the DAC and the analog input voltage. An amplifier included in the AD converter amplifies the difference and feeds the amplified difference to an N-bit ADC, which is another of the parallel ADCs.
An N-bit shifter also included in the AD converter raises the digital data output from the M-bit ADC by N bit positions toward its most significant bit position. An adder also included in the AD converter adds both of the digital data output from the N-bit ADC and the N-bit shifter to each other to thereby output the (M+N) bits of digital data from the output terminal of the AD converter.
A problem with the conventional AD converter described above is that the DAC must convert the digital data to which the analog input voltage was converted to a further analog voltage, thus incurring some time delay in the entire AD conversion. Another problem is that the inclusion of the differential circuit and the amplifier, which handle the analog voltages, possibly aggravates errors. The conventional AD converter is therefore likely to cause the conversion to be delayed and deteriorate the accuracy in AD conversion.
It Is an object of the present invention to provide an AD converter in which the delay and errors are minimized in AD conversion.
In accordance with the present invention, an analog-to-digital conversion circuit includes a series of quantizers each for comparing an input analog voltage with a reference voltage to convert the analog voltage to digital data and outputting a voltage representative of a difference of the input voltage from a voltage corresponding to the digital data. Each quantizer includes a comparator for comparing the analog voltage with the reference voltage to output the result of comparison. A first amplifier amplifies a voltage representative of a difference of the analog voltage from the reference voltage. A second amplifier inverts the voltage representative of the difference of the analog voltage from the reference voltage and amplifies the inverted voltage. A first and a second switch are respectively connected to the first and second amplifiers for selecting either one of the output voltages of the first and second amplifiers in accordance with the result of comparison output from the comparator. A data output circuit develops and outputs the digital data in accordance with the result of comparison and digital data fed from the preceding quantizer.